Microprocessor

A microprocessor is a programmable chip that fetches, decodes and executes instructions stored in memory. The Intel 8085 (8-bit) is the usual reference processor for this topic, with comparisons to the 8086 (16-bit). This topic covers the internal architecture and features of the 8085 and the basics of assembly-language programming: instruction groups, addressing modes, flags and simple programs.

Key concepts

• Key features of the 8085: 8-bit data bus, 16-bit address bus (addresses $2^{16}$ = 64 KB of memory), 40-pin DIP, single +5 V supply, about 3 MHz clock (crystal frequency is divided by 2), multiplexed lower address/data bus AD0–AD7 (separated using the ALE signal and a latch), 74 instructions (246 opcodes), five hardware interrupts, and serial I/O pins SID/SOD.
• Internal architecture:
  • Accumulator (A): 8-bit register used in most arithmetic/logic operations; holds one operand and the result.
  • General-purpose registers: B, C, D, E, H, L (8-bit), usable as pairs BC, DE, HL (16-bit). HL is often used as a memory pointer (M).
  • Program Counter (PC): 16-bit, holds the address of the next instruction.
  • Stack Pointer (SP): 16-bit, points to the top of the stack in RAM; the stack grows downward (PUSH decrements SP by 2).
  • ALU: performs arithmetic and logical operations with the accumulator and temporary register.
  • Flag register (5 flags): S (sign), Z (zero), AC (auxiliary carry, used for BCD/DAA), P (parity, set for even parity), CY (carry).
  • Instruction register and decoder, timing and control unit (generates RD̅, WR̅, IO/M̅, ALE, etc.), interrupt control and serial I/O control.
• Machine cycles and T-states: An instruction cycle consists of one or more machine cycles (opcode fetch, memory read/write, I/O read/write); each machine cycle takes 3–6 T-states (clock periods). Opcode fetch takes 4 T-states (6 for some instructions).
• 8085 vs 8086:

Feature	8085	8086
Data bus	8-bit	16-bit
Address bus	16-bit (64 KB)	20-bit (1 MB)
Memory	linear	segmented (CS, DS, SS, ES)
Pipelining	none	6-byte instruction queue (BIU/EU)

• Assembly language: Uses mnemonics (MVI, ADD, JMP) instead of binary opcodes; an assembler converts it to machine code. Instruction size: 1, 2 or 3 bytes.
• Instruction groups:
  • Data transfer: MOV, MVI, LDA, STA, LXI, LDAX, STAX, LHLD, SHLD, XCHG, IN, OUT (do not affect flags).
  • Arithmetic: ADD, ADI, ADC, SUB, SUI, SBB, INR, DCR, INX, DCX, DAD, DAA. (INX/DCX affect no flags; INR/DCR affect all except CY.)
  • Logical: ANA, ANI, ORA, XRA, CMP, CPI, RLC, RRC, RAL, RAR, CMA, CMC, STC.
  • Branch: JMP, JZ/JNZ, JC/JNC, JP/JM, JPE/JPO, CALL, RET, RST n.
  • Machine control: HLT, NOP, EI, DI, SIM, RIM.
• Addressing modes: Immediate (MVI A, 32H), Register (MOV A, B), Direct (LDA 2050H), Register indirect (MOV A, M or LDAX B), Implied/implicit (CMA, RAL).
• Subroutines and stack: CALL pushes the return address on the stack and jumps; RET pops it back into PC. PUSH/POP save and restore register pairs (PSW = A + flags).
• Typical programs: adding two numbers, finding the largest in an array, counting, block transfer, delay loops.

High-yield points

• 8085: 8-bit data bus, 16-bit address bus (64 KB), 40 pins, single +5 V supply.
• Five flags: S, Z, AC, P, CY; P = 1 for even parity.
• ALE demultiplexes AD0–AD7.
• Opcode fetch takes 4 T-states (6 for some instructions).
• INX/DCX affect no flags; INR/DCR affect all flags except CY.
• 8086: 20-bit address bus (1 MB), 6-byte instruction queue.

Formulas

Memory addressable: $2^{\text{address lines}}$ bytes. 16 lines → 65 536 bytes = 64 KB.

$T_{delay} = N_T \times T_{clk}$ $N_T$ = total T-states executed, $T_{clk}$ = clock period (s), e.g. 0.333 µs at 3 MHz.

For a single loop: $N_T = T_{outside} + N(T_{loop}) - 3$ (the final JNZ not taken takes 7 instead of 10 T-states).

Worked example

What is in the accumulator and the carry flag after this program?

MVI A, 9CH
MVI B, 7AH
ADD B

1. 9CH = 1001 1100 (156), 7AH = 0111 1010 (122).
2. Sum = 278 = 116H.
3. A keeps the lower 8 bits = 16H; CY = 1.
4. Z = 0 (result not zero); S = 0 (bit 7 of 16H is 0).

Exam tips

• 8085 has 5 flags; the zero flag is set when the result is zero.
• Parity flag set = even number of 1s in the result.
• ALE is used to demultiplex AD0–AD7.
• LXI is a 3-byte instruction; MOV is 1 byte; MVI is 2 bytes.
• INX/DCX change no flags — a common trap when writing loop counters with register pairs.

Exam-style questions

From Calmon's question bank, which has 54 questions on this topic.

1. What is Microprocessor?

• A. A multipurpose PLD that accepts binary data as input
• B. A multipurpose PLD that accepts an integer as input
• C. A multipurpose PLD that accepts whole numbers as input
• D. A multipurpose PLD that accepts prime numbers as input

Answer: A. A microprocessor is a multipurpose PLD that accepts binary data as input and processes data according to the instructions, and outputs the result. Binary instructions are read from memory.

2. Which of the following is correct about 8086 microprocessor?

• A. Intel's first x86 processor
• B. Motrola's first x86 processor
• C. STMICROELECTRONICS's first x86 processor
• D. NanoXplore x86 processor

Answer: A. The Intel 8086 is Intel's first x86 processor. They launched the most powerful processor in terms of advanced architecture i.e. 8086 processor in 1978. It has larger memory addressing capability and a powerful instruction set.

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